A Low power CMOS operational amplifier (Op- Amp) which operates at 1.8V power supply. The unique behavior of the MOS transistors in saturation region not only allows a designer to work at a low voltage, but also at a high frequency. Designing of two-stage op-amps is a multi-dimensional optimization problem where optimization of one or more parameters may easily result into degradation of others. The Op- Amp is designed to exhibit a unity gain frequency of 20MHz and exhibits a gain of 68.24dB. The ability adopted, to use smaller compensation capacitor (CC), which improves the slew rate and also, benefits for the area of compensation circuit. In order to verify the viability two-stage op-amp at SCNO 180 nm CMOS technology. Power consumption is reducing.