Adders are one of the most widely digital components in the digital integrated circuit design and are the necessary part of Digital Signal Processing (DSP) applications. With the advances in technology, researchers have tried and are trying to design adders which offer either high speed, low power consumption, less area or the combination of them. The addition of the two bits is very Based on the various speed-up schemes for binary addition, a comprehensive overview and a qualitative evaluation of the different existing basic adder architectures are given in this paper. In addition, their comparison is performed in the thesis for the performance analysis. We will synthesize the adders - Ripple Carry adder, Carry look- ahead Adder, Carry Save Adder in ISE XIILINX 10.1 by using HDL - Verilog and will simulate them in Modelsim 6.4a. We will Compare above mentioned adders in terms of Delay, Slices Used and Look up tables used by the adder architecture.